DIO-ZENITH: Combining LLM Generation with Deterministic Code Judgment for Patent Specification
An 8-stage LLM + Code pipeline for patent specifications. 46 quality gates enforce KIPO compliance via 32,636 lines of Rust.
Abstract
Patent specification drafting requires 2-4 weeks and USD 3,000-10,000 per application. DIO-ZENITH automates Korean (KIPO), US, and European patent specifications using an 8-phase LLM-Writer plus Code-Judge pipeline. Claude 3.5 Sonnet generates 100 percent of specification text while 46 quality gates (pure Rust, zero LLM) enforce KIPO compliance. Evaluation on 325+ tests and real-world filings shows 95%+ success within 3 retries, with moat defensibility scoring and multi-jurisdiction output. The 32,636-line production system reduces patent drafting from weeks to minutes while guaranteeing formal compliance.
1. Patent Drafting Bottleneck
Patent specification drafting requires simultaneous mastery of electrical engineering and patent law. A skilled attorney must: (1) analyze technical architecture, (2) define independent claims (device/method/system/medium), (3) construct dependent claims with 3:1+ ratios, (4) defend against 5+ invalidation vectors per claim, (5) measure prior art distance, (6) generate KIPO SVG-compliant figures, (7) ensure Korean formality of 0.85+ and terminology consistency of 0.90+, (8) produce KR/US/EP variants.
Reality: 2-4 weeks, USD 3,000-10,000 per specification.
LLM Limitations
Modern LLMs excel at instruction-following but hallucinate legal constraints: violate KIPO rules, introduce internal terminology, generate invalid dependent claims, fail consistency checks, violate SVG compliance.
Solution: Separate concerns. LLM generates text (fluent, fast). Code validates (auditable, deterministic).
2. 8-Phase Pipeline
Each phase: LLM generation → Code validation (46 gates) → Retry loop (max 3) → Artifact recording.
PH0: Technical Document Analysis. Extract algorithms, components. QG1-2. PH1: Claim Design. 4+ independent claims. QG3-6, formality of 0.85+. PH2: Attack & Defense. 5+ invalidation vectors. QG7-11. PH3: Prior Art Distance. Novelty measurement. QG21-22 (TF-IDF of 0.30 or less). PH4: KIPO Specification. Full spec, SVG figures, moat score. QG12-29. PH5: Quality Inspection. Consistency check. QG23-24, QG32-46. PH6: P13Guard. Scan for internal terms. QG41 critical. PH7: Jurisdiction Variants. US/EP adaptation. QG30-31, QG36.
3. Quality Gate Architecture
46 gates: 12 critical (block), 20 important (warn), 14 informational.
Retry: Critical fail → LLM retry with specific detail (max 3 times) → block if all fail.
Guarantees: Reproducibility, Auditability, Speed (under 10ms), Coverage.
4. Moat Defensibility
Moat = Σ(wi × Ai) × S
- A0 = scope ratio
- A1 = PA distance [0,1]
- A2 = dependency depth
- A3 = TDF (Technical Defense Factor)
- A4 = QG41 bonus
- S = structure score
Range [0,10]. Scores of 6+ indicate strong defensibility.
5. Results
Scale: 32,636 LOC, 325+ tests, 4 formats, 3 jurisdictions.
Convergence (23 filings): 0 retries 13%, 1 retry 52%, 2 retries 78%, 3 retries 95%.
Real-world: Filing 1 (4.2 min, 96% QG, moat 7.8), Filing 2 (3.8 min, 98% QG, moat 8.4). Both KIPO accepted.
Time: 99.7% reduction. Cost: 99% reduction. Revisions: 80% reduction.
Conclusion
DIO-ZENITH combines LLM fluency with deterministic code validation. Achieves 95%+ KIPO compliance, enables patents in minutes. Future: PCT multi-jurisdiction, real-time prior art, collaborative dashboard.
Paradigm shift: Amplifying human expertise in IP automation.